1. Field of the Invention
The present invention relates to an information processing system comprising a plurality of modules which are notably constituted on the basis of a processor and of a local bus which serves various peripherals.
The invention likewise relates to telecommunications equipment comprising a plurality of modules which are notably constituted on the basis of a processor and of a local bus which serves various peripherals, and notably of a multiplexer of data transmitted according to the synchronous digital hierarchy (SDH).
2. Description of the Related Art
In many information processing systems, it is typical to utilize a plurality of processor-based modules for the purpose of redundance or for the purpose of distributing the information processing so as to increase the performance of the system. For example, it is possible to shift a processing-time consuming function to a dedicated module, or in telecommunications equipment, to use a first module dedicated to the management of the equipment, and a second module dedicated to the management of the communications.
The problem which then appears is that of getting the various modules to communicate with each other.
French Patent Application No. 2667175, filed by the Assignee on Sep. 25, 1990, describes a method for putting processors in communication via a common memory whose access is controlled by an arbitration circuit.
However, the arbitration circuits which are commercially available at present make it possible to manage only the dynamic memory. The field of application of such a method is thus limited.